Altera Cyclone III Development Board

• Cyclone III development board (DK-DEV-3C120N)
  • Cyclone III EP3C120F780 FPGA
  • Embedded USB-Blaster circuitry (includes an Altera MAX II CPLD) - allowing download of FPGA configuration files via the flash device or the host computer
• Memory
  • 256 Mbytes of dual-channel DDR2 SDRAM with ECC
  • 8 Mbytes of synchronous SRAM
  • 64 Mbytes of flash
• Communication ports
  • 10/100/1000 Ethernet
  • USB 2.0 
• Power and analog devices
  • Switching power supply
  • Switching and step-down regulators 
  • Analog to digital converter 
  • LDO regulators 
• Clocking
  • 50-MHz and 125-MHz on-board oscillators
  • SMA inputs/outputs 
  • Inputs/outputs for the two HSMC connectors
  • Various buttons, switches, and indicators 
• Display
  • 128 x 64 graphics LCD
  • 2-line x 16-character LCD
• Connectors
  • Two HSMCs
  • USB type B
• Debug tools
  • Three HSMC debug cards (two loop-back and a debug header)
• Cables and power/analog
  • 14-V–20-V DC input
  • On-board power measurement circuitry
  • 19.8 W per HSMC interface
  • Power cord with plug adapters (US, UK, EU) 
• Cyclone III FPGA Development Kit, CD-ROM
  • Design examples for the Cyclone III FPGA development board
  • Complete documentation
    • User guide
    • Reference manual
    • Board schematic and layout
    • Bill of materials
    • Product and partner information
• Altera Complete Design Suite DVD
  • Quartus® II design software
    • Subscription Edition (optional feature, available for purchase) 
    • Web Edition (no charge, Windows only) 
  •  ModelSim®-Altera software
    • Altera Edition (optional feature, available for purchase)
    • Web Edition (no charge, Windows only) 
  •  MegaCore® IP Library - OpenCore Plus evaluation
    • Includes Nios II processor (evaluation license)
  • Nios II Embedded Design Suite, Evaluation Edition (no charge)
  • DSP Builder (optional feature, available for purchase)
  • Video demos of Quartus II software and Nios II embedded processor

DVI-HSMC Card

• Digital Transmitter
  • One DVI transmitter with single transmitting port
  • Digital Visual Interface (DVI) Compliant
  • Supports resolutions from VGA to UXGA (25 MHz – 165 MHz Pixel Rates)
  • Universal Graphics Controller Interface
    • 12-Bit, Dual-Edge and 24-Bit, Single-Edge Input Modes
    • Adjustable 1.1 V to 1.8 V and Standard 3.3 V CMOS Input Signal Levels
    • Fully Differential and Single-Ended Input Clocking Modes 
    • Standard Intel 12-Bit Digital Video Port Compatible as on Intel™ 81x Chipsets
  • Enhanced PLL Noise Immunity 
    • On-Chip Regulators and Bypass Capacitors for Reducing System Costs
  • Enhanced Jitter Performance
    • No HSYNC Jitter Anomaly
    • Negligible Data-Dependent Jitter
      • Programmable Using I²C Serial Interface
      • Single 3.3-V Supply Operation 
• Digital Receiver
• One DVI receiver with sinle receiving port
• Supports UXGA Resolution (Output Pixel Rates Up to 165 MHz)
• Digital Visual Interface (DVI) Specification Compliant
• True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
• Laser Trimmed Internal termination Resistors for Optimum Fixed Impedance Matching
• 4x Over-Sampling
• Reduced Ground Bounce Using Time Staggered Pixel Outputs
• Lowest Noise and Best Power Dissipation Using TI PowerPAD™ Packaging

• Size: Cyclone III development kit - 155.6X190.5mm / DVI daughter card - 41 x 78.11mm

Download

Documents

Title	Version	Size(KB)	Date Added	Download
Cyclone III FPGA Development Kit User Guide		1525	2010-04-01
HSMC-DVI User Guide		1195	2010-04-01

CD-ROM

Title	Version	Size(KB)	Date Added	Download
Cyclone III FPGA Development Kit CD-ROM			2010-05-24
DVI-HSMC board CD-ROM			2010-05-24